Details

Project TitleCMAT (Complementary Magnetic Tunnel Junction Logic)
Track Code2013-120
Short Description

A novel logic family that provides computing performance and efficiency improvements, thus making it possible to replace CMOS for general-purpose computing as scaling approaches its inherent limits.

#semiconductor #component #transistor #materials #fabrication #devices

Abstract

Northwestern researchers have developed a novel logic family that provides computing performance and efficiency improvements, thus making it possible to replace CMOS for general-purpose computing as scaling approaches its inherent limits. This invention, CMAT (Complementary MAgnetic Tunnel junction logic) is a novel logic family composed solely of magnetic tunnel junctions to form complimentary pull-up and pull-down networks. This logic family solves the challenge of direct cascading in spintronic logic circuits while also providing non-volatile data storage. The increased logic density possible with complementary outputs coupled with a gate-switching mechanism driven by spin-switching rather than electron motion permits logical computation with higher efficiency than CMOS. Furthermore, the presence of non-volatile memory within the logic structure provides a feasible hardware for non-Von Neumann computer architectures.

 
TagsDEVICES: fabrication, MATERIALS: semiconductor, SEMICONDUCTOR: component, SEMICONDUCTOR: transistor
 
Posted DateMay 15, 2014 2:02 PM

Inventor(s)

Joseph Friedman

Allan Sahakian*

Applications

  • High performance computing
  • General computing
  • Mobile computing
  • Low power computing
  • Low temperature computing

Advantages

  • Non-volatile logic (memory-in-logic)
  • Potential for higher computing efficiency
  • Spintronic switching
  • Cascaded logic
  • Makes effective use of magnetic tunnel junctions

Publications

IP Status

A provisional patent application has been filed.

Contact Information

Arjan Quist, PhD

Invention Associate
(p) 847-467-0305

(e) arjan.quist@northwestern.edu