Details

Project TitleGate-Tunable Nanoscale Memristors
Track Code2015-017
Short Description

Novel nanoscale, three terminal memristors for new logic architectures and neuromorphic circuits

#device #fabrication #electronics #nanotechnology

Abstract

Northwestern researchers have developed a new class of memristors based on grain boundaries in single-layer MoS2 devices. The resistance of grain boundaries emerging from contacts can be easily and repeatedly modulated, with switching ratios up to ~103 and dynamic negative differential resistance. The atomically thin nature of MoS2 enables tuning of the SET voltage by a third gate terminal in a field-effect geometry, providing new functionality that can be incorporated into neurmorphic circuits and non-volatile memory devices not observed in other known memristive devices.

 
TagsDEVICE: fabrication, electronics, NANOTECHNOLOGY: fabrication
 
Posted DateApr 7, 2015 5:07 PM

Inventor(s)

Mark Hersam*

Lincoln Lauhon

Tobin Marks

In Soo Kim

Deep Jariwala

Vinod Sangwan

Applications

  • Novel logic architectures
  • Non-volatile memory
  • Neuromorphic logic and circuits

Advantages

  • Three terminals
  • Tunable
  • Small size

IP Status

Provisional patent application has been filed.

Publications

Marketing Contact

Arjan Quist, PhD

Invention Manager 

(p) 847-467-0305

(e) arjan.quist@northwestern.edu